Program Summary:  Today's backplane environment presents significant challenges for high speed digital designers. Trade-offs between signal integrity performance, cost and reliability must be made to achieve the proper architecture for a robust physical layer channel. The right combination of connectors, dielectric materials and topology must be used to accomplish this engineering task. This paper will discuss an in-depth design of experiments using combinations of three different high speed connectors, three different dielectric materials and three different channel lengths. Data will be gathered with a 12-port vector network analyzer and the results will be presented in time domain, frequency domain and eye diagram domain.